81. AN INTEGRATE-AND-DUMP RECEIVER FOR HIGH DYNAMIC RANGE PHOTONIC ANALOG-TO-DIGITAL CONVERSION

Department: Electrical & Computer Engineering
Faculty Advisor(s): James Buckwalter

Primary Student
Name: Timothy D Gathman
Email: tgathman@ucsd.edu
Phone: 858-534-5665
Grad Year: 2012

Abstract
Sampling jitter limits the resolution for next-generation multi-GS/s wideband sampling and analog-to-digital conversion systems. As the input bandwidth is increased, lower and lower aperture jtters are required in the clock source and sampling circuits. Traditionally, photonic sources and sampling gates have more than an order-of-magnitude performance benefit compared to electrical sources and sampling circuits. In this work, a high-linearity integrate-and-dump circuit is proposed for the electrical interface to a low-jitter photonic sampling system. The integrate-and-dump receiver operates at 2 GS/s and better than 7.5 effective-number-of-bits is measured with a sinewave input. The integrate-and-dump receiver is fabricated in a 120nm SiGe BiCMOS technology and dissipates less than 750mW.

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