55. MINERVA: A COMPUTE CAPABLE SSD ARCHITECTURE FOR NEXT-GENERATION NON-VOLATILE MEMORIES

Department: Computer Science & Engineering
Faculty Advisor(s): Rajesh Gupta | Steven Swanson

Primary Student
Name: Arup De
Email: arde@ucsd.edu
Phone: 858-534-9895
Grad Year: 2012

Abstract
Emerging fast, byte-addressable non-volatile memory (NVM) technologies, such as phase-change memory (PCM), spin-torque transfer memory (STT) and magnetoresistive memory (MRAM) are very promising and are projected to have DRAM-like performance with lower power consumption and higher density. However, existing storage I/O interfaces (e.g. PCIe, SATA etc.) are not adequate to fully utilize those memories, and become potential bottlenecks for future computing system. To eliminate I/O bottlenecks and better utilize emerging storage technologies, we propose a novel SSD architecture called Minerva. It offloads data-intensive application code to the storage array to exploit the low latency and high bandwidth of these new NVM technologies, and significantly reduce the data traffic between the host and the storage. We propose a generic command/status mechanism to dispatch computations which allows applications to be executed efficiently and safely, and ensures a consistent view of data both from the application running on the host and in the storage device. Minerva uniquely supports acceleration of large scale applications exhibit poor locality and perform poorly on conventional systems due to large I/O overhead. We provide a detailed description of how to map those applications to Minerva architecture and evaluate the performance of Minerva using two such applications: search for a pattern in a file (grep) and graph breadth-first search (BFS). Minerva achieves more than an order of magnitude speedup over the conventional PCIe-attached NVM SSD for both applications.

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