56. LIFETIME MARGIN REDUCTION BY EXPLOITING NON-UNIFORM EFFECTS OF ELECTROMIGRATION

Department: Computer Science & Engineering
Faculty Advisor(s): Andrew B. Kahng | Tajana Simunic-Rosing

Primary Student
Name: Siddhartha Nath
Email: sinath@ucsd.edu
Phone: 858-822-5003
Grad Year: 2016

Abstract
Technology scaling makes electromigration as a key reliability problem. Chip designers always consider the worst-case effects of electromigration (EM) and over-design their parts leading to high costs. In this research, we argue that EM effects in signal wires are non-uniform and are application dependent. This causes a very wide distribution of mean time to failures (MTTF) of wires in the chip. We use this information to formulate physical design problems that will reduce the distribution of MTTF across wire in a chip adjusting margins non-uniformly. We use the RTL model of the UltraSPARC T1 processor and the SPEC2006 benchmark suite to validate our model.

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