UCSD Jacobs School of Engineering University of California San Diego
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Dean Tullsen Architects Revolution in Microprocessing

Intel recently began shipping the first commercial versions of its high-end Intel® Xeon™ microprocessors for servers with a revolutionary new capability called hyper-threading. And Jacobs School Computer Science and Engineering Professor Dean Tullsen couldn’t be prouder. That’s because his work and a patent on the technology (begun at the University of Washington in the mid 1990s) is widely accepted as critical to its commercial adoption.

Hyper-threading is Intel’s copyrighted name for what Tullsen calls “simultaneous multithreading,” SMT for short. “Threads” are streams of instructions (e.g., programs) that a processor executes. Many software applications already break their code up into separate threads, but even those that don’t can take advantage of it, as long as the system has multiple programs to be run. An SMT processor executes instructions from these multiple threads/programs at once, as if they all came from a single thread. The CPU duplicates the architectural state on each processor, while sharing one set of processor execution resources. Intel claims an average improvement of roughly 40% in CPU resource utilization— providing greater throughput and improved performance.

For a 5% increase in hardware cost, Tullsen estimates, semiconductors equipped with SMT can process almost twice as many instructions in the same amount of time as the same chip without the technology enabled. For now, Intel is the only semiconductor company building the technology into its chips, and so far, only for servers. But Tullsen predicts that it’s only a matter of time before the technology spreads from high-end chips to all microprocessors. And as co-director of the Processor Architecture and Compilation Lab at UCSD—Tullsen is already working on SMT-related improvements, including operating systems, compilers, and the next generation of multithreaded processor architectures.