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Circuit Simulation Software Heads to the Marketplace

CSE professor C.K. Cheng
CSE professor C.K. Cheng

Today’s integrated circuits can contain 100 million elements packed onto nanometer-sized chips. Simulating and verifying these elements are critical to chip designers, but the sheer density of the latest chips is stretching current simulation tools to their limits.

This spring, San Jose, CA-based Fastrack Design (www.fastrack-design.com) saw its first sales on a new suite of software products for quick and accurate transistor level, full-chip analysis. The technology is based on three UCSD patents by CSE professor C.K. Cheng who developed a new algebraic formulation as a solver engine. The circuit simulation technology avoids the high complexity and slow convergence of other tools on the market. It is the first program to accurately analyze all elements of a dense chip simultaneously, enabling designers to verify the interactions between components. Fastrack plans a major product launch later this summer.

“Simulation and verification requires a lot of improvement to keep up with chip technology advancements,” says Fastrack CEO Moazzem Hossain. “We believe the UCSD technology has potential to offer significant capacity and speed improvement over existing tools for circuit simulation.”

Cheng says the relationship with Fastrack is ideal. “Fastrack keeps us connected to the chip design industry, so that we can focus our research on the most relevant problems. At the same time we can see our work transferred from the lab to market for the benefit of society.”

While Fastrack is commercializing Cheng’s technology, the company is also funding his continuing research. In addition to improving circuit simulation, Cheng is working on high-speed, low-power interconnects for integrated circuits. Another recent interest: applying simulation modeling techniques to improve analysis of medical EKGs used to diagnose cardiac arrhythmias.