a 113 pw fully integrated cmos temperature sensor operating at 0.5 v
Name: Hui Wang
Grad Year: 2018
This paper discusses design techniques that enable transduction and digitization of temperature at very low power levels. An example architecture is presented that transduces temperature in a fully-integrated CMOS chip by charging a pair of digitally-controllable integrated capacitors with a pair of pA current sources that are proportional-to and constant-with temperature, respectively, and digitally controlling the charge time between the two paths via a discrete-time feedback loop for direct temperature digitization. The 0.15 mm2 65 nm temperature sensor is shown to achieve a resolution of 0.21 oC and a maximum inaccuracy of +/11.93 oC, all at an average power of 113 pW.