binary star: enabling efficient resilient memory system design
Name: Xiao Liu
Grad Year: 2020
DRAM scaling faces challenges in reliability and energy cost. Technology nodes uner 20nm suffers from 10x soft error rate as now. Existing works either suffers from hardware cost or storage overhead. On the other hand, refresh power increase drasticly with the storage density. Emerging non-volatile memory provides an alternative. We identify persistent memory does not only survive power failure, but also helps recover from other devices errors. In this work, we propose Binary Star, a resilient memory system design. By combing basic level of error detection code and persistent memory, our design is as reliable as current ECC memory with same or even better performance.
Industry Application Area(s)
Internet, Networking, Systems