Qualcomm FMA

 

 

Fellow-Mentor-Advisor (FMA) Fellowships

 

The Qualcomm Fellow-Mentor-Advisor Fellowship is a fellowship program for outstanding UCSD Jacobs School of Engineering doctoral students nominated by their Faculty Advisors.

The Program brings together teams which include an engineering Ph.D. candidate, his/her faculty advisor and an engineering mentor from Qualcomm. The goal is to foster in-depth connections between the Jacobs School faculty and Qualcomm engineers while enhancing the education of doctoral students. Qualcomm FMA fellowships are awarded annually (a minimum of 4).

 

Fellowship Summary

  • Total monetary value of the award is $80,000.
  • Student's tuition, fees and stipend for up to 12 months.
  • Discretionary funding to the Faculty Advisor's research program related to the research plan of the fellow; includes conference travel funds for fellow.
  • Fellows will receive guidance from an experienced Qualcomm Mentor.
  • Payment of the fellowship award, as described above, will be made directly to the university, and is not transferable to another academic institution or department.

 

Eligibility Criteria

  • Applicants for the Qualcomm FMA must be nominated by their faculty advisor.
  • Student must be enrolled as a doctoral student in good standing within one of the six academic departments of the UCSD Jacobs School of Engineering.
  • Students must have completed at least one year of study at UCSD in their doctoral program.
  • Student should be working in a research topic of interest to Qualcomm's future business development.

 

Identifying a Qualcomm Mentor

  • Qualcomm Mentors are Qualcomm employees whose expertise is appropriate to the research project and who will be an integral member of the research team.
  • Qualcomm Mentors may be individuals with whom the Faculty Advisor already works.
  • In the case that a mentor is unknown, please indicate on Interest Statement. Qualcomm will circulate the Interest Statement to see if there is an appropriate engineering leader at Qualcomm who may want to serve as a mentor on the project.
  • If a mentor is identified, the Qualcomm Mentor will contact the Faculty Advisor so they can confirm mutual interests and possibly invite the faculty member to present a seminar at Qualcomm before the final application is submitted.
  • The FMA Mentorship is for one year, at minimum.

 

How to Apply

Step One: Interest Statement

  • FMA interest statement can be submitted anytime.
  • The interest statement submission should include a one-paragraph description of the proposed student research project, and indication of whether a Qualcomm Mentor is identified or not.
  • Please allow a minimum of one month from submission for Qualcomm's review.

Step Two: Application

  • If your interest statement is selected, a Qualcomm representative will contact you to proceed and submit an application.
  • The Faculty Advisor should include the following information with their submission:
    • Student's research project description (1-2 pages developed in consultation with Qualcomm Mentor)
    • Student Nominee's CV
    • Faculty Advisor's short CV (1-2 page)
  • Qualcomm will review the application and make the final award selections.

 

Technical Areas of Interest

Qualcomm has provided some technical areas of interest. Other technical area proposals not indicated below can be submitted, as this list is not all inclusive.

  • Ultra-low (uW) power embedded platform for edge computing (ULP architectures and designs, HW accelerators, power generation and management, novel memories, security)
  • Novel materials and heterogeneous integration (2D semiconductors, GaAs, GaN, etc.)
  • CMOS package integration (thermal-aware designs or circuits, advanced packaging techniques, antenna-in-package etc.)
  • RF / analog ASICs and architectures (Sub-6GHz 5G power amplifiers, mmWave RFIC and Data Converters for 5G NR, adaptive RF signal processing algorithms, etc.)
  • Advanced antenna (mmWave and phase-array antennas), novel antenna materials, structures and implementations
  • Power Management ASICs (wide bandwidth SMPS, wide bandwidth envelope tracker, embedded regulation)
  • PA linearization techniques for high efficiency PAs
  • ASIC implementation methodology development for improved Performance, Power, Area, Yield. On-die power grid analysis and optimization, dynamic and static power optimizations, silicon-driven static timing analysis, design optimization for yield improvement
  • Low-power high-speed Data Converters
  • Low-power high-bandwidth SERDES for die to die and chip to chip communication
  • Low-power high-bandwidth memory interface (DRAM and FLASH) circuits
  • Ultra-low power ML HW design using mixed-signal techniques (such as Compute-In-Memory and analog neural network)
  • Mixed-signal Analog and RF HW design using ML techniques
  • Digital wireless transceivers
  • Interference/jammer cancellation and concurrent transceivers/coexistence
  • Piezoelectric and ferroelectric materials and their application in novel micro-acoustic devices and RF-MEMS
  • Reliable low latency communications for licensed/unlicensed in mid band and mmW spectrum
  • Machine learning designs for wireless communications systems and algorithms
  • Joint communication and sensing/positioning techniques for licensed and unlicensed spectrum
  • Vehicle-vehicle, vehicle to infrastructure, and vehicle-pedestrian communications design
  • Cooperative sensing and communication for radar and other sensors
  • Enhanced ultra wideband and associated ranging techniques (UWB, 802.15.4z/ab, 802.15.14)
  • Network topologies using OAM, LOS MIMO, Intelligent surfaces, etc.
  • Low energy networks (Wi-Fi, Bluetooth LE, 802.15.4, Zigbee, etc.)
  • Low-power signal-processing algorithms for mmW massive-MIMO communication systems
  • Advanced low power HW/FW/SW modem implementation approaches
  • New signal-processing techniques and use-cases using RF sensing (wireless channel capture)
  • Iterative detection and decoding algorithms
  • Non coherent communication for low power IoT
  • Communication systems design in THz bands
  • Security topics including physical layer security, privacy and resilience
  • Advanced sensors and sensor fusion
  • Imaging radar
  • Computer vision for autonomy
  • Sensor fusion with deep learning
  • Behavior planning with uncertainty
  • Motion and interaction prediction
  • Self-supervised learning
  • Natural language processing and Voice user interface
  • Computer vision and geometric deep learning
  • Reinforcement and continual learning
  • ML for combinatorial optimization
  • Graph neural networks
  • On-device training and model personalization
  • Intermediate representation for machine learning workloads/compilers
  • Transfer learning and Knowledge distillation
  • Extreme energy efficient inference hardware accelerators for ML loads and lower complexity algorithms and convolutional nets
  • Deep generative modeling and unsupervised learning
  • Bayesian deep learning and uncertainty estimation
  • Federated learning
  • Self-supervised learning
  • Causality and interactive learning
  • Real Time 3D perception, mapping, reconstruction, and geometry interpretation
  • Eye-tracking devices and algorithms
  • Hand skeleton and multimodal human body pose estimation and tracking
  • Low power/complexity rendering systems
  • Lighting/illumination modelling
  • Multi-focal, near eye displays
  • High efficiency video coding techniques
  • Deep learning based image and video compression (intra and inter prediction, in-loop filters, transforms, entropy coding)
  • Deep learning based optimized video encoding
  • Perceptually optimized video coding
  • Image and video quality assessment
  • 6DoF video compression, Point Cloud compression
  • Biometric Sensor Technologies
  • Few-shot learning in human activity classification
  • Dynamic texture and shape synthesis in the wild
  • Learning universal networks for multiple tasks in computer vision, e.g. detecting, tracking, segmenting objects and scenes in videos
  • Error-robust speech coding, voice conversion, speech synthesis, non-acoustic speech capture or estimation
  • Deep learning based speech quality assessment
  • Facial avatar animation from speech
  • Error-robust speech coding, voice conversion, speech synthesis, non-acoustic speech capture or estimation
  • Deep learning based speech quality assessment
  • Facial avatar animation from speech
  • Novel processor architectures, microarchitectures, and circuits for high-performance, energy-efficient, and reliable computing
  • Multimedia and gaming architectures (not limited to GPU, GPGPU, VLIW, DSP, etc.)
  • Novel architectures for artificial intelligence, edge training, inference and processing in memory
  • Security features of CPUs and accelerators at the instruction set, execution, storage (including caches) and SOC levels
  • CAD for SOC and VLSI Design
  • Machine learning CAD for VLSI HW design
  • Isolation technologies: Virtualization, enclaves, and software sandboxing
  • Key management for IoT: Establishing trust between embedded devices
  • Machine learning model security against adversarial attacks
  • Protocol security: Analysis and verification of communication protocols such as 3GPP for 5G to discover security issues both in standards and their implementations
  • SoC security: Security of heterogeneous systems on chip
  • Software-based exploitation of hardware vulnerabilities, such as micro-architectural, side-channels and glitch attacks, and proper countermeasures
  • User authentication: Biometric and behavioral authentication of users by mobile and embedded devices
  • Vulnerability detection: New tools and techniques for finding exploitable vulnerabilities in Software and/or Hardware, with a focus on embedded systems
  • Solutions for data provenance, privacy and security
  • 5G test techniques for mmWave and sub6 devices and system
  • Defect-oriented testing and fault modeling in deep sub-micron process nodes
  • Applications of Data Analytics, Machine Learning and AI in Test
  • Test Challenges for 2.5D/3D Systems in Packages

 

Recent Winners

Reduction of PPA and Cost in Advanced-Node SoC Design

Faculty Advisor: Andrew Kahng
Student Fellow: Lutong Wang
Qualcomm Mentor: Tuck-Boon Chan
Awarded: Feb 2019

 

Privacy-preserving Federated Learning for On-Device Training of Large Machine-Learning Models

Faculty Advisor: Kamalika Chauduri
Student Fellow: Mary Anne Smart
Qualcomm Mentor: Max Welling / Matthias Reisser
Awarded: Feb 2019

 

Printable Zinc Batteries for Low Power IOT Wi-Fi Transceivers

Faculty Advisor: Shirley Meng & Joseph Wang
Student Fellow: Jonathan Scharf
Qualcomm Mentor: Derrick Lin
Awarded: Dec 2018

 

Dual Reference Edge FDC-PLL for Ultra-Low Phase Noise RF LO Synthesis

Faculty Advisor: Ian Galton
Student Fellow: Amr Eissa
Qualcomm Mentor: Yiwu Tang
Awarded: 2018/19

 

Dual Reference Edge FDC-PLL for Ultra-Low Phase Noise RF LO Synthesis

Faculty Advisor: Ian Galton
Student Fellow: Amr Eissa
Qualcomm Mentor: Yiwu Tangg
Awarded: 2018/19

 

Dual Reference Edge FDC-PLL for Ultra-Low Phase Noise RF LO Synthesis

Faculty Advisor: Duygu Kuzum
Student Fellow: Yuhan Shi
Qualcomm Mentor: Jaeyoung Kim
Awarded: 2018/19

 

Smart Sensors for Enhanced Radar Imaging and Localization

Faculty Advisor: Piya Pal
Student Fellow: Heng Qiao
Qualcomm Mentor: Teja Sukhavasi
Awarded: 2018/19

 

View All Past Winners

 

Jacobs School of Engineering FMA Contacts

 

Lisa Russon
(858) 534-4950
lrusson@ucsd.edu

Jan Dehesh
(858) 534-2329
jdehesh@ucsd.edu