News Release
UCSD DEVELOPS 8-ELEMENT 6-18 GHz PHASED ARRAY CHIP
SAN DIEGO, Calif., March 07, 2007 — The University of California, San Diego (UCSD), provider of a leading program in mixed-signal, microwave and millimeter-wave RFICs, today announced that it has developed an 8-element RFIC phased array receiver covering the 6-18 GHz frequency range. The chip was designed and tested by Kwangjin Koh, a Ph.D. student at UCSD in Prof. Gabriel M. Rebeiz’ group, and was sponsored by the DARPA SMART (Scalable Millimeter-Wave Array Technology) program under the direction of Dr. Mark Rosker, and under a subcontract to UCSD from Teledyne Scientific Corporation in Thousand Oaks, CA.
The RFIC chip contains 8 silicon low-noise amplifiers operating at 6-18 GHz, 8 phase shifters with at least 4-bit of phase control, and an 8:1 active power combiner with very wide bandwidth, together with all the digital functions needed to control the chip such as the address decoders for the individual 8-elements, the memory latches for the phase settings, the clock enable functions to load the information on the chip, and power regulators. The chip is only 2.2x2.3 mm in area, consumes 140-200 mA of DC current from a 3.3 V power supply, provides an RF gain from 12 to 24 dB with a noise figure of 6 dB, and can be integrated directly with 8 planar antennas on a standard printed circuit board.
Furthermore, the chip can operate over a narrow bandwidth for communication systems, or over an instantaneous 12 GHz (6-18 GHz) bandwidth while keeping all its performance un-changed, thus solving one of the key barriers to complex phased array fabrication. The application areas are in low cost phased arrays for mobile satellite systems, smart-antenna wireless systems for high data-rate communications, and of course, defense systems such as radars and high-bandwidth telecommunication links covering the X to Ku-Band frequency range.
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| Block diagram and micro-photograph of the 8-element 6-18 GHz phased array receiver. The chip was designed at UCSD and fabricated using the Jazz SBC18HXL process, and is only 2.2x2.3 mm2. Click here for higher resolution image. |
The phased array chip was developed using Jazz Semiconductor’s SiGe BiCMOS process, SBC18HXL, which offers high-performance 0.18-micron SiGe bipolar and high quality passive elements. The process offers SiGe transistors with peak Ft of 155GHz and peak Fmax of 200GHz ideal for low-power, high performance microwave and millimeter wave circuits.
“UCSD believes that the silicon RFIC phased array controller will be a disruptive element in the design of future phased array systems and will replace at least 16 GaAs chips,” said Gabriel M. Rebeiz, Professor of Electrical Engineering at UCSD, a co-developer of this chip. The chip is available from UCSD and interested parties should contact Prof. Gabriel M. Rebeiz.
About Phased Arrays
Phased arrays allow the electronic steering of an antenna beam in any direction and with high antenna gain by controlling the phase at each antenna element. The radiation beam can be “moved in space” using entirely electronic means through control of the phase and amplitude at each antenna element used to generate the beam. This beam steering technique is much more compact and much faster than mechanically steered arrays. Furthermore, phased arrays allow the creation of deep nulls in the radiation pattern to mitigate strong interference signals from several different directions. They have been in use since the 1950s in defense applications but have seen limited use in commercial system due to their relatively high cost. UCSD’s design and utilization of Jazz existing wafer processes are targeted to greatly reduce the cost of phased arrays.
About UCSD
The University of California, San Diego, is one of the leading Universities in mixed-signal, microwave and mm-wave RFICs, digital communications, applied electromagnetic, RF MEMS (microelectromechanical systems) and nano-electronics research, and is home to the Center for Wireless Communications and the DARPA S&T Center for RF MEMS Reliability and Design Fundamentals. UCSD has an annual research budget exceeding $700M, and its Jacobs School of Engineering is ranked as Number 11 in the US-News and World Report 2007 ranking. The Electrical and Computer Engineering Department, where this work was done, has 52 teaching tenure faculty and trains around 400 graduate students per year. For more information, please visit www.ece.ucsd.edu and www.ucsd.edu.
More information: Jazz Semiconductor Press Release
Media Contacts
Daniel Kane
Jacobs School of Engineering
858-534-3262
dbkane@ucsd.edu