Distinguished Professor, CSE
Distinguished Professor, ECE
Professor Kahng is an expert on the physical design of Very Large Scale Integrated circuits (VLSI), along with the VLSI design-manufacturing interface, the application of AI and machine learning to chip design, and the technology roadmap for semiconductors and semiconductor-based design.
Ever since the integrated circuit or IC was invented, transistor counts and clock speeds on microprocessors, memory, and other chips have doubled roughly every two years. In his career, Kahng has led multiple efforts to maintain this pace, dubbed Moore's Law. A long-term focus has been to define the next-generation computer-aided design (CAD) tools that take into account physical design aspects of ICs in advanced technology nodes. Challenges seen in the physical implementation of logic have been driving up product costs as IC designs have grown more complex. Kahng's work is at the leading edge of algorithms and software tools that keep design costs in check, particularly for IC placement and routing, power delivery and optimizations for low power, interconnect analysis and optimization, and other critical aspects of chip implementation. Kahng has also pioneered key directions such as "design for manufacturability" at the interface between fabless design firms and semiconductor foundries, and the application of artificial intelligence and machine learning to improve design tools and IC product quality. He has also led "roadmapping" efforts that help rationalize and inform research spending by manufacturers, government organizations and universities.
Andrew B. Kahng is Distinguished Professor of CSE and ECE and holder of the endowed chair in high-performance computing at UC San Diego. He was visiting scientist at Cadence (1995-97) and founder/CTO at Blaze DFM (2004-06). He is coauthor of 3 books and over 500 journal and conference papers, holds 35 issued U.S. patents, and is a fellow of ACM and IEEE. He was the 2019 Ho-Am Prize laureate in Engineering. He has served as general chair of DAC, ISPD and other conferences, and from 2000-2016 served as international chair/co-chair of the International Technology Roadmap for Semiconductors (ITRS) Design and System Drivers working groups. He has been principal investigator of the U.S. DARPA-funded “OpenROAD” project (https://theopenroadproject.