Professor Kahng is an expert on the physical design of Very Large Scale Integrated circuits (VLSI), and a key strategist defining the International Technology Roadmap for Semiconductors. ITRS specifies the technology developments needed to keep pace with Moore's Law.
Ever since the integrated circuit or IC was invented, transistor counts and clock speeds on microprocessors, memory, and other chips have doubled roughly every two years. Kahng is a leader in multiple efforts to maintain this pace, dubbed Moore's Law. One focus is helping to specify the next-generation computer-aided design (CAD) tools that take into account physical design aspects once left for the foundry. Problems with physical implementations of logic have been driving up costs as IC designs have grown more complex. Kahng can speak extensively about this topic and the state of the art in software for IC placement and routing, power leakage, interconnect analysis and optimization, and other physical phenomena. Kahng is a leader in "roadmapping" efforts that help rationalize research spending. Since 2000, Kahng has been chair of the Design technology working group for the International Technology Roadmap for Semiconductors. ITRS is sponsored by the major semiconductor consortia of North America, Europe, and the Far East, and also is backed by key manufacturers, suppliers, government organizations, and universities.
Kahng is a Professor in UCSD's Jacobs School of Engineering's Computer Science & Engineering and Electrical and Computer Engineering departments, where he holds the endowed chair in High-Performance Computing. He heads up the UCSD VLSI CAD Laboratory, is on the executive committee of the MARCO Design and Test focus center, and has for 12 years chaired or co-chaired the design and system drivers roadmaps in the International Technology Roadmap for Semiconductors. Kahng came to UCSD in January 2001, from the University of California, Los Angeles. He received his PhD in Computer Science from UCSD in 1989.